1. Field of the Invention
The invention relates to voltage regulation within an integrated circuit, and more particularly to the on-chip regulation of the supply voltage of a flash memory using a bandgap voltage reference and the use of calibration data in feedback loops.
2. Description of the Related Art
The problem of regulating the supply voltage for flash memory circuits is the supply range specification for read and write access operation is very small and therefore precise supply voltage regulation and voltage monitoring is required. All this is difficult to achieve in integrated circuits. This problem is further aggravated by the external power supply voltage generation and the external Reset and power-on-reset (POR) generation.
U.S. Patents of the related art that bear on the present invention are:
    U.S. Pat. No. 6,791,893 (Pekny et al.) discloses the regulation of voltages in which includes providing a first voltage using a voltage regulator, determining that a second voltage level is desired and initializing the voltage regulator to provide the second voltage level.    U.S. Pat. No. 6,753,722 (Kondapalli et al.) teaches a method and apparatus where a voltage regulator receives a first reference voltage and provides a regulated voltage. A comparator compares a second reference voltage with the regulated voltage. Its output signals if the difference between the input signals is greater than its offset voltage. A voltage clamp then clamps the regulated voltage to the second reference voltage.    U.S. Pat. No. 6,738,298 (Cioaca et al.) describes a reference voltage adjustment circuit where a decoder is coupled to a counter circuit. The decoder generates a resistance selection signal that creates a resistance value. This resistance value is coupled to a reference voltage circuit which in turn generates an updated reference voltage.    U.S. Pat. No. 6,535,424 (Le et al.) presents the application of a voltage detection circuit which is used to measure the VCC applied to a voltage boost circuit which generates a boosted word line voltage for the read mode. By compensating for the variations in the VCC supply applied to the voltage boost circuit, the boost voltage is regulated.
One solution is to use feedback loops to force a tighter control over the VDD supply voltage and POR generation upon which the Read/Write flash memory control depends. However, since systems with several feedback loops are problematic to control, a new approach is required for generating a precise supply voltage and the associated voltage monitoring. With on-chip voltage supply regulation there is needed a calibration of the voltage regulator for accurate VDD-level generation. Another requirement is that the calibration value needs to be stored within the flash memory. For signaling when the flash memory operates outside of its voltage supply range and to inhibit flash memory access, accurate Power-On-Reset (POR) and VDD monitoring are necessary. The on-chip POR/VDD monitoring circuit also needs accurate threshold level generation through calibration and the storing of the calibration value within the flash memory. The present invention detailed below; solves the above mentioned problems and satisfies the requirements discussed above, in particular system stability.